20197 search results - page 429 / 4040 » Comparing Computational Power |
170
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IPL
2007
15 years 6 months ago
2007
We study the circuit complexity of the powering function, defined as POWm(Z) = Zm for an n-bit integer input Z and an integer exponent m poly(n). Let LTd denote the class of func...
127
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CORR
2011
Springer
15 years 1 months ago
2011
Springer
Circulant matrices play a central role in a recently proposed formulation of three-way data computations. In this setting, a three-way table corresponds to a matrix where each “...
182
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ICASSP
2011
IEEE
14 years 10 months ago
2011
IEEE
—Both the communication limitation and the measurement properties based algorithm become the bottleneck of enhancing the traditional power system state estimation speed. The avai...
149
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DAC
1998
ACM
16 years 7 months ago
1998
ACM
This paper presents a method for power and ground (p/g) network routing for high speed CMOS chips with multiple p/g pads. Our objective is not to reduce the total amount of the gr...
150
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DAC
2005
ACM
2005
ACM
Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction
16 years 7 months ago
To reduce power, Vdd programmability has been proposed recently to select Vdd-level for interconnects and to powergate unused interconnects. However, Vdd-level converters used in ...