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NOCS
2008
IEEE
16 years 1 months ago
Adding Slow-Silent Virtual Channels for Low-Power On-Chip Networks
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
Hiroki Matsutani, Michihiro Koibuchi, Daihan Wang,...
DCC
2000
IEEE
15 years 11 months ago
Arithmetic Coding for Low Power Embedded System Design
We present a novel algorithm that assigns codes to instructions during instruction code compression in order to minimize bus-related bit-toggling and thus reducing power consumpti...
Haris Lekatsas, Wayne Wolf, Jörg Henkel
ISLPED
1997
ACM
116views Hardware» more  ISLPED 1997»
15 years 11 months ago
Power reduction techniques for a spread spectrum based correlator
This paper presents the design of a low power spread spectrum correlator. We look at two major approaches and evaluate the best alternative for power reduction. We first consider...
David Garrett, Mircea R. Stan
DAC
2012
ACM
13 years 9 months ago
Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs
Due to the large geometry of through-silicon-vias (TSVs) and their connections to the power grid, significant current crowding can occur in 3D ICs. Prior works model TSVs and pow...
Xin Zhao, Michael Scheuermann, Sung Kyu Lim
VLSID
2004
IEEE
120views VLSI» more  VLSID 2004»
16 years 7 months ago
Dynamic Power Optimization of Interactive Systems
Abstract-- Power has become a major concern for mobile computing systems such as laptops and handhelds, on which a significant fraction of software usage is interactive instead of ...
Lin Zhong, Niraj K. Jha