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DAC
2008
ACM
16 years 7 months ago
The design of a low power carbon nanotube chemical sensor system
This paper presents a hybrid CNT/CMOS chemical sensor system that comprises of a carbon nanotube sensor array and a CMOS interface chip. The full system, including the sensor, con...
Taeg Sang Cho, Kyeong-jae Lee, Jing Kong, Anantha ...
179
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FOCS
2007
IEEE
15 years 10 months ago
Discrepancy and the Power of Bottom Fan-in in Depth-three Circuits
We develop a new technique of proving lower bounds for the randomized communication complexity of boolean functions in the multiparty `Number on the Forehead' model. Our meth...
Arkadev Chattopadhyay
CHES
2008
Springer
108views Cryptology» more  CHES 2008»
15 years 8 months ago
Exploiting the Power of GPUs for Asymmetric Cryptography
Modern Graphics Processing Units (GPU) have reached a dimension with respect to performance and gate count exceeding conventional Central Processing Units (CPU) by far. Many modern...
Robert Szerwinski, Tim Güneysu
VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
16 years 7 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
15 years 8 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang