20197 search results - page 265 / 4040 » Comparing Computational Power |
157
click to vote
IMECS
2007
15 years 8 months ago
2007
— In this paper, we propose a bus encoding scheme to minimize coupling effects which cause significant power consumption in the on-chip interconnects. The proposed bus encoding s...
181
click to vote
TVLSI
2002
15 years 6 months ago
2002
Simultaneous switching noise (SSN) has become an important issue in the design of the internal on-chip power distribution networks in current very large scale integration/ultra lar...
214
click to vote
DATE
2010
IEEE
15 years 5 months ago
2010
IEEE
—Starting from sequential programs, we present an approach combining data reuse, multi-level MapReduce, and pipelining to automatically find the most power-efficient designs th...
142
Voted
ICPR
2008
IEEE
16 years 1 months ago
2008
IEEE
Inspired by recent advances in psychological studies on motion-based face perception, we examine in this paper, from the viewpoint of pattern recognition, the identity information...
156
click to vote
IPPS
2005
IEEE
16 years 5 days ago
2005
IEEE
A new high performance computation technique involving multiple processors on a single silicon die is quickly gaining popularity. This new design approach provides very high perfo...