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VLSI
2012
Springer
14 years 2 months ago
A Signature-Based Power Model for MPSoC on FPGA
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...
Roberta Piscitelli, Andy D. Pimentel
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
16 years 26 days ago
STEFAL: A System Level Temperature- and Floorplan-Aware Leakage Power Estimator for SoCs
In this paper we demonstrate the impact of the floorplan on the temperature-dependent leakage power of a System on Chip (SoC). We propose a novel system level temperature aware a...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...
FPL
2009
Springer
106views Hardware» more  FPL 2009»
15 years 11 months ago
Low power techniques for Motion Estimation hardware
Motion Estimation (ME) is the most computationally intensive and the most power consuming part of video compression and video enhancement systems. In this paper, we propose a nove...
Caglar Kalaycioglu, Onur C. Ulusel, Ilker Hamzaogl...
GLVLSI
2008
IEEE
190views VLSI» more  GLVLSI 2008»
16 years 1 months ago
A low leakage 9t sram cell for ultra-low power operation
This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The proposed 9T cell utilizes a scheme with separate read and write wordlines; it i...
Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi
ICASSP
2008
IEEE
16 years 1 months ago
Fast noise tracking based on recursive smoothing of MMSE noise power estimates
We consider estimation of the noise spectral variance from speech signals contaminated by highly nonstationary noise sources. In each time frame, for each frequency bin, the noise...
Jan S. Erkelens, Richard Heusdens