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ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
16 years 3 months ago
Simultaneous power and thermal integrity driven via stapling in 3D ICs
The existing work on via-stapling in 3D integrated circuits optimizes power and thermal integrity separately and uses steadystate thermal analysis. This paper presents the first ...
Hao Yu, Joanna Ho, Lei He
ISVLSI
2006
IEEE
137views VLSI» more  ISVLSI 2006»
16 years 18 days ago
Low Power Layered Space-Time Channel Detector Architecture for MIMO Systems
This paper presents the low power implementation of a Maximum Likelihood (ML) based detector used in the receiver part of a Multiple Input and Multiple Output (MIMO) systems. Low ...
T. Takahashi, Ahmet T. Erdogan, Tughrul Arslan, J....
DATE
2005
IEEE
121views Hardware» more  DATE 2005»
16 years 6 days ago
Joint Power Management of Memory and Disk
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
Le Cai, Yung-Hsiang Lu
SBCCI
2005
ACM
132views VLSI» more  SBCCI 2005»
16 years 4 days ago
Design and power optimization of CMOS RF blocks operating in the moderate inversion region
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
Leonardo Barboni, Rafaella Fiorelli
ISCAS
2002
IEEE
80views Hardware» more  ISCAS 2002»
15 years 11 months ago
Power line communication front-ends based on ADSL technology
The practical implementation of communication over power lines (PLC) using an Asymmetric Digital Subscriber Line (ADSL) front-end is discussed. Both PLC and ADSL modems are based ...
J. Van den Keybus, B. Bolsens, Johan Driesen, Ronn...