20197 search results - page 232 / 4040 » Comparing Computational Power |
144
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
This paper studies microprocessor floorplanning considering thermal and throughput optimization. We first develop a stochastic heat diffusion model taking into account the appl...
155
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SAINT
2008
IEEE
16 years 28 days ago
2008
IEEE
This paper presents initial experiment results toward realizing a multi-core CPU for wireless sensor nodes. The multi-core CPU reduces power consumption with enabling users to eas...
163
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ISCAS
2006
IEEE
16 years 17 days ago
2006
IEEE
Abstract— In this paper, we present an algorithm/architecturelevel design solution for implementing state-parallel adaptive Viterbi decoders that, compared with their Viterbi cou...
151
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IWSOC
2005
IEEE
16 years 3 days ago
2005
IEEE
This paper explores the design and optimization of Quasi-Floating Gate MOS techniques to lowvoltage/low-power digital circuitry. The simulated power consumption of standard CMOS g...
258
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ISCAS
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper proposes a shared-capacitor charge-sharing ROM (SCCS-ROM). The SCCS-ROM reduces the swing voltage using the charge-sharing technique of the charge-sharing ROM (CSROM) [...