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LCTRTS
2007
Springer
16 years 20 days ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
IPPS
2002
IEEE
15 years 11 months ago
Dynamic Power Management of Multiprocessor Systems
Power management is critical to power-constrained real-time systems. In this paper, we present a dynamic power management algorithm. Unlike other approaches that focus on the trad...
Jinwoo Suh, Dong-In Kang, Stephen P. Crago
ISLPED
2010
ACM
193views Hardware» more  ISLPED 2010»
15 years 6 months ago
PASAP: power aware structured ASIC placement
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
Ashutosh Chakraborty, David Z. Pan
OSDI
2008
ACM
16 years 6 months ago
A Comparison of High-Level Full-System Power Models
Dynamic power management in enterprise environments requires an understanding of the relationship between resource utilization and system-level power consumption. Power models bas...
Suzanne Rivoire, Parthasarathy Ranganathan, Christ...
ASPDAC
2008
ACM
83views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Run-time power gating of on-chip routers using look-ahead routing
Since on-chip routers in Network-on-Chips play a key role in on-chip communication between cores, they should be always preparing for packet injections even if a part of cores are ...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...