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DSD
2003
IEEE
138views Hardware» more  DSD 2003»
15 years 11 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
WSC
1997
15 years 7 months ago
Collision Awareness Multiple Access Networks Performance Optimization
Collision awareness (CA) multiple access networks include the carrier sense multiple access (CSMA), ALOHA, and Ethernet networks. In order to maximize throughput with minimum netw...
Paul T. R. Wang, Yoon K. Hong
INFOCOM
2003
IEEE
15 years 11 months ago
User-Level Performance of Channel-Aware Scheduling Algorithms in Wireless Data Networks
— Channel-aware scheduling strategies, such as the Proportional Fair algorithm for the CDMA 1xEV-DO system, provide an effective mechanism for improving throughput performance in...
Sem C. Borst
PVM
2007
Springer
16 years 7 days ago
Optimization of Collective Communications in HeteroMPI
Abstract. HeteroMPI is an extension of MPI designed for high performance computing on heterogeneous networks of computers. The recent new feature of HeteroMPI is the optimized vers...
Alexey L. Lastovetsky, Maureen O'Flynn, Vladimir R...
ICCCN
2007
IEEE
16 years 14 days ago
Two-Phase Modeling of QoS Routing in Communication Networks
— We propose a precomputation-based scheme which offers Pareto optimal solutions to the network dimensioning problem. This scheme is performed by means of a two-phase procedure. ...
Chia-Hung Wang, Hsing Luh