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ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
15 years 11 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...
205
Voted
ICDCS
2000
IEEE
15 years 11 months ago
Scheduling Heuristics for Data Requests in an Oversubscribed Network with Priorities and Deadlines
Providing up-to-date input to users’ applications is an important data management problem for a distributed computing environment, where each data storage location and intermedi...
Mitchell D. Theys, Noah Beck, Howard Jay Siegel, M...
CANPC
2000
Springer
15 years 11 months ago
Transparent Network Connectivity in Dynamic Cluster Environments
Improvements in microprocessor and networking performance have made networks of workstations a very attractive platform for high-end parallel and distributed computing. However, t...
Xiaodong Fu, Hua Wang, Vijay Karamcheti
SRDS
1998
IEEE
15 years 11 months ago
AQuA: An Adaptive Architecture that Provides Dependable Distributed Objects
Dependable distributed systems are difficult to build. This is particularly true if they have dependability requirements that change during the execution of an application, and are...
Michel Cukier, Jennifer Ren, Chetan Sabnis, David ...
PPOPP
1997
ACM
15 years 10 months ago
LoPC: Modeling Contention in Parallel Algorithms
Parallel algorithm designers need computational models that take first order system costs into account, but are also simple enough to use in practice. This paper introduces the L...
Matthew Frank, Anant Agarwal, Mary K. Vernon
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