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ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
16 years 4 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
ICCAD
2008
IEEE
109views Hardware» more  ICCAD 2008»
16 years 4 months ago
Verifying external interrupts of embedded microprocessor in SoC with on-chip bus
—The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in the unit-level. Especially for the external interrupts, since they interface with othe...
Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang
ICCAD
2007
IEEE
131views Hardware» more  ICCAD 2007»
16 years 4 months ago
Low-overhead design technique for calibration of maximum frequency at multiple operating points
— Determination of maximum operating frequencies (Fmax) during manufacturing test at different operating voltages is required to: (a) to ensure that, for a Dynamic Voltage and Fr...
Somnath Paul, Sivasubramaniam Krishnamurthy, Hamid...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
16 years 4 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
PEPM
2009
ACM
16 years 4 months ago
Guided model checking for programs with polymorphism
Exhaustive model checking search techniques are ineffective for error discovery in large and complex multi-threaded software systems. Distance estimate heuristics guide the concre...
Neha Rungta, Eric G. Mercer
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