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PPL
2008
185views more  PPL 2008»
15 years 6 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
EVOW
2003
Springer
15 years 12 months ago
GAME-HDL: Implementation of Evolutionary Algorithms Using Hardware Description Languages
Evolutionary Algorithms (EAs) have been proposed as a very powerful heuristic optimization technique to solve complex problems. Many case studies have shown that they work very eff...
Rolf Drechsler, Nicole Drechsler
RSP
1999
IEEE
160views Control Systems» more  RSP 1999»
15 years 11 months ago
Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
Oliver Bringmann, Wolfgang Rosenstiel, Annette Mut...
INFORMATICALT
2010
122views more  INFORMATICALT 2010»
15 years 5 months ago
On a Time-Varying Parameter Adaptive Self-Organizing System in the Presence of Large Outliers in Observations
In the previous papers (Pupeikis, 2000; Genov et al., 2006; Atanasov and Pupeikis, 2009), a direct approach for estimating the parameters of a discrete-time linear time-invariant (...
Rimantas Pupeikis
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
16 years 1 months ago
A high-level debug environment for communication-centric debug
—A large part of a modern SOC’s debug complexity resides in the interaction between the main system components. ion-level debug moves the abstraction level of the debug process...
Kees Goossens, Bart Vermeulen, Ashkan Beyranvand N...