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VTS
2002
IEEE
126views Hardware» more  VTS 2002»
15 years 11 months ago
On Using Rectangle Packing for SOC Wrapper/TAM Co-Optimization
The testing time for a system-on-chip (SOC) is determined to a large extent by the design of test wrappers and the test access mechanism (TAM). Wrapper/TAM co-optimization is ther...
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan M...
LCTRTS
2007
Springer
16 years 23 days ago
Generalizing parametric timing analysis
In the design of real-time and embedded systems, it is important to establish a bound on the worst-case execution time (WCET) of programs to assure via schedulability analysis tha...
Joel Coffman, Christopher A. Healy, Frank Mueller,...
AICCSA
2007
IEEE
89views Hardware» more  AICCSA 2007»
16 years 1 months ago
Software/Configware Implementation of Combinatorial Algorithms
This paper discusses an approach for solving combinatorial problems by combining software and dynamically reconfigurable hardware (configware). The suggested technique avoids inst...
Iouliia Skliarova, Valery Sklyarov
MSS
2000
IEEE
160views Hardware» more  MSS 2000»
15 years 11 months ago
Implementation of a Fault-Tolerant Real-Time Network-Attached Storage Device
Phoenix is a fault-tolerantreal-time network-attachedstorage device (NASD). Like other NASD architectures, Phoenix provides an object-based interface to data stored on network-att...
Ashish Raniwala, Srikant Sharma, Anindya Neogi, Tz...
EMNLP
2010
15 years 4 months ago
Inducing Probabilistic CCG Grammars from Logical Form with Higher-Order Unification
This paper addresses the problem of learning to map sentences to logical form, given training data consisting of natural language sentences paired with logical representations of ...
Tom Kwiatkowksi, Luke S. Zettlemoyer, Sharon Goldw...