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» Combinations of Modal Logics
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ICCAD
1999
IEEE
75views Hardware» more  ICCAD 1999»
15 years 10 months ago
Functional timing optimization
A common approach to performance optimization of circuits focuses on re-synthesis to reduce the length of all paths greater than the desired delay . We describe a new delay optimi...
Alexander Saldanha
APSEC
1998
IEEE
15 years 10 months ago
A Refinement Calculus for the Development of Real-Time Systems
We present a calculus which can transfer specifications to objects for the development of real-time systems. The object model is based on a practical OO development technique--HRT...
Zhiqiang Chen, Antonio Cau, Hussein Zedan, Xiaodon...
IPPS
1998
IEEE
15 years 10 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
DEXAW
1996
IEEE
79views Database» more  DEXAW 1996»
15 years 10 months ago
Managing Multiple Representations of Georeferenced Elements
This paper presents a framework for the management of multiple representations of georeferenced elements in a GIS environment. This solution is presented from a database perspecti...
Claudia Bauzer Medeiros, Marie-Jo Bellosta, Genevi...
LICS
1994
IEEE
15 years 10 months ago
Foundations of Timed Concurrent Constraint Programming
We develop a model for timed, reactive computation by extending the asynchronous, untimed concurrent constraint programming model in a simple and uniform way. In the spirit of pro...
Vijay A. Saraswat, Radha Jagadeesan, Vineet Gupta