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VLSID
2002
IEEE
94views VLSI» more  VLSID 2002»
16 years 6 months ago
Timing Yield Calculation Using an Impulse-Train Approach
This paper presents a new method to compute the probability distribution of the delay of a combinational circuit and uses it obtain an estimate of the yield of the process that ma...
Srinath R. Naidu
CADE
2007
Springer
16 years 6 months ago
Inferring Invariants by Symbolic Execution
In this paper we propose a method for inferring invariants for loops in Java programs. An example of a simple while loop is used throughout the paper to explain our approach. The m...
Benjamin Weiß, Peter H. Schmitt
CADE
2003
Springer
16 years 6 months ago
Proof Search and Proof Check for Equational and Inductive Theorems
This paper presents on-going researches on theoretical and practical issues of combining rewriting based automated theorem proving and user-guided proof development, with the stron...
Eric Deplagne, Claude Kirchner, Hélè...
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
16 years 3 months ago
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
Mihir R. Choudhury, Quming Zhou, Kartik Mohanram
WOLLIC
2009
Springer
16 years 1 months ago
Forcing-Based Cut-Elimination for Gentzen-Style Intuitionistic Sequent Calculus
We give a simple intuitionistic completeness proof of Kripke semantics with constant domain for intuitionistic logic with implication and universal quantification. We use a cut-fr...
Hugo Herbelin, Gyesik Lee