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LCPC
1998
Springer
15 years 10 months ago
Copy Elimination for Parallelizing Compilers
Techniques for aggressive optimization and parallelization of applications can have the side-effect of introducing copy instructions, register-to-register move instructions, into t...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
IFL
1997
Springer
15 years 10 months ago
WITH-Loop-Folding in SAC - Condensing Consecutive Array Operations
This paper introduces a new compiler optimization called with-loop-folding. It is based on a special loop construct, the withloop, which in the functional language Sac (for Single ...
Sven-Bodo Scholz
ASPLOS
1992
ACM
15 years 10 months ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
ANSS
2004
IEEE
15 years 10 months ago
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
Jie Tao, Josef Weidendorfer
CODES
2004
IEEE
15 years 10 months ago
CPU scheduling for statistically-assured real-time performance and improved energy efficiency
We present a CPU scheduling algorithm, called Energy-efficient Utility Accrual Algorithm (or EUA), for battery-powered, embedded real-time systems. We consider an embedded softwar...
Haisang Wu, Binoy Ravindran, E. Douglas Jensen, Pe...