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RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
16 years 1 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
DIMVA
2009
15 years 8 months ago
Polymorphing Software by Randomizing Data Structure Layout
Abstract. This paper introduces a new software polymorphism technique that randomizes program data structure layout. This technique will generate different data structure layouts f...
Zhiqiang Lin, Ryan Riley, Dongyan Xu
MODELS
2010
Springer
15 years 5 months ago
Modeling Features at Runtime
A feature represents a functional requirement fulfilled by a system. Since many maintenance tasks are expressed in terms of features, it is important to establish the corresponden...
Marcus Denker, Jorge Ressia, Orla Greevy, Oscar Ni...
CJ
2006
84views more  CJ 2006»
15 years 6 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
CCS
2010
ACM
15 years 7 months ago
DIFC programs by automatic instrumentation
Decentralized information flow control (DIFC) operating systems provide applications with mechanisms for enforcing information-flow policies for their data. However, significant o...
William R. Harris, Somesh Jha, Thomas W. Reps