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264
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VLDB
2007
ACM
169views Database» more  VLDB 2007»
16 years 7 months ago
Staying FIT: Efficient Load Shedding Techniques for Distributed Stream Processing
In distributed stream processing environments, large numbers of continuous queries are distributed onto multiple servers. When one or more of these servers become overloaded due t...
Nesime Tatbul, Stanley B. Zdonik, Ugur Çeti...
SPDP
1993
IEEE
15 years 11 months ago
Extended Distributed Genetic Algorithm for Channel Routing
In this paper, we propose a new parallel genetic alge rithm (GA), called Extended Distributed Genetic Algorithm (EDGA), for channel routing problem. The EDGA combines the advantag...
B. B. Prahlada Rao, R. C. Hansdah
288
Voted

Publication
351views
17 years 7 months ago
Synthesizable High Level Hardware Descriptions
Modern hardware description languages support code-generation constructs like generate/endgenerate in Verilog. These constructs are intended to describe regular or parameterized ha...
Jennifer Gillenwater, Gregory Malecha, Cherif Sala...
PEPM
2009
ACM
17 years 6 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
MIDDLEWARE
2009
Springer
16 years 1 months ago
DR-OSGi: Hardening Distributed Components with Network Volatility Resiliency
Abstract. Because middleware abstractions remove the need for lowlevel network programming, modern distributed component systems expose network volatility (i.e., frequent but inter...
Young-Woo Kwon, Eli Tilevich, Taweesup Apiwattanap...