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FCCM
2009
IEEE
134views VLSI» more  FCCM 2009»
15 years 10 months ago
Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants
Scheduling and partitioning of task graphs on reconfigurable hardware needs to be carefully carried out in order to achieve the best possible performance. In this paper, we demons...
Miaoqing Huang, Vikram K. Narayana, Tarek A. El-Gh...
APPROX
2006
Springer
124views Algorithms» more  APPROX 2006»
15 years 10 months ago
Combinatorial Algorithms for Data Migration to Minimize Average Completion Time
The data migration problem is to compute an efficient plan for moving data stored on devices in a network from one configuration to another. It is modeled by a transfer graph, wher...
Rajiv Gandhi, Julián Mestre
CVPR
2012
IEEE
13 years 8 months ago
Submodular dictionary learning for sparse coding
A greedy-based approach to learn a compact and discriminative dictionary for sparse representation is presented. We propose an objective function consisting of two components: ent...
Zhuolin Jiang, Guangxiao Zhang, Larry S. Davis
ICDE
2007
IEEE
193views Database» more  ICDE 2007»
16 years 7 months ago
Categorization and Optimization of Synchronization Dependencies in Business Processes
requirement. Furthermore, programming using sequence constructs normally produce nested structures and The current approachfor modeling synchronization in scattered code, especiall...
Qinyi Wu, Calton Pu, Akhil Sahai, Roger S. Barga
RTCSA
2006
IEEE
16 years 8 days ago
Instruction Scheduling with Release Times and Deadlines on ILP Processors
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
Hui Wu, Joxan Jaffar, Jingling Xue