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ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
16 years 3 months ago
Network-on-Chip: The Intelligence is in The Wire
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
Gérard Mas, Philippe Martin
CP
2009
Springer
16 years 1 months ago
Pin Assignment Using Stochastic Local Search Constraint Programming
Abstract. VLSI chips design is becoming increasingly complex and calling for more and more automation. Many chip design problems can be formulated naturally as constraint problems ...
Bella Dubrov, Haggai Eran, Ari Freund, Edward F. M...
CEC
2008
IEEE
16 years 1 months ago
High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis
— The high-level synthesis process involves three interdependent and NP-complete optimization problems: (i) the operation scheduling, (ii) the resource allocation, and (iii) the ...
Christian Pilato, Daniele Loiacono, Fabrizio Ferra...
DAC
2008
ACM
16 years 7 months ago
Analysis and implications of parasitic and screening effects on the high-frequency/RF performance of tunneling-carbon nanotube F
Intrinsic and parasitic capacitances play an important role in determining the high?frequency RF performance of devices. Recently, a new type of carbon nanotube field effect trans...
Chaitanya Kshirsagar, Mohamed N. El-Zeftawi, Kaust...
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
16 years 3 months ago
A flexibility aware budgeting for hierarchical flow timing closure
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
Olivier Omedes, Michel Robert, Mohammed Ramdani