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GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
16 years 8 days ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
DAC
2005
ACM
16 years 7 months ago
High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trad
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
Andrey V. Zykov, Elias Mizan, Margarida F. Jacome,...
ISCAS
2006
IEEE
96views Hardware» more  ISCAS 2006»
16 years 20 days ago
Approximately linear-phase recursive digital filters with variable magnitude characteristics
Abstract— This paper considers designing in the minimax sense complementary low-pass/high-pass approximately linear-phase recursive filters with variable magnitude characteristi...
Juha Yli-Kaakinen, Tapio Saramäki
DAC
2004
ACM
16 years 2 days ago
Large-scale placement by grid-warping
Grid-warping is a new placement algorithm based on a strikingly simple idea: rather than move the gates to optimize their location, we elastically deform a model of the 2-0 chip s...
Zhong Xiu, James D. Z. Ma, Suzanne M. Fowler, Rob ...
SUTC
2010
IEEE
15 years 5 months ago
Transaction-Level Modeling for Sensor Networks Using SystemC
—As sensor networks are finding widespread use across many applications, designers increasingly must not only focus on application development, but also on sensor network optimiz...
Jeff Hiner, Ashish Shenoy, Roman L. Lysecky, Susan...