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ICCAD
2007
IEEE
125views Hardware» more  ICCAD 2007»
16 years 3 months ago
A methodology for timing model characterization for statistical static timing analysis
While the increasing need for addressing process variability in sub-90nm VLSI technologies has sparkled a large body of statistical timing and optimization research, the realizati...
Zhuo Feng, Peng Li
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 3 months ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
VMCAI
2010
Springer
16 years 1 months ago
Regular Linear Temporal Logic with Past
This paper upgrades Regular Linear Temporal Logic (RLTL) with past operators and complementation. RLTL is a temporal logic that extends the expressive power of linear temporal logi...
César Sánchez, Martin Leucker
ASPLOS
2010
ACM
16 years 1 months ago
Dynamically replicated memory: building reliable systems from nanoscale resistive memories
DRAM is facing severe scalability challenges in sub-45nm technology nodes due to precise charge placement and sensing hurdles in deep-submicron geometries. Resistive memories, suc...
Engin Ipek, Jeremy Condit, Edmund B. Nightingale, ...
MIR
2010
ACM
200views Multimedia» more  MIR 2010»
16 years 1 months ago
Controlling your TV with gestures
Vision-based user interfaces enable natural interaction modalities such as gestures. Such interfaces require computationally intensive video processing at low latency. We demonstr...
Ming-yu Chen, Lily B. Mummert, Padmanabhan Pillai,...