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DAC
2005
ACM
16 years 7 months ago
Microarchitecture-aware floorplanning using a statistical design of experiments approach
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
CHI
2006
ACM
16 years 7 months ago
A role for haptics in mobile interaction: initial design using a handheld tactile display prototype
Mobile interaction can potentially be enhanced with welldesigned haptic control and display. However, advances have been limited by a vicious cycle whereby inadequate haptic techn...
Jérôme Pasquero, Joseph Luk, Karon E....
HPCA
2003
IEEE
16 years 7 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
EWSN
2004
Springer
16 years 6 months ago
Design of Surveillance Sensor Grids with a Lifetime Constraint
A surveillance area is to be monitored using a grid network of heterogeneous sensor nodes. There are two types of nodes; type 0 nodes which perform sensing and relaying of data wit...
Vivek Mhatre, Catherine Rosenberg, Daniel Kofman, ...
CEC
2009
IEEE
16 years 1 months ago
An adaptive coevolutionary Differential Evolution algorithm for large-scale optimization
— In this paper, we propose a new algorithm, named JACC-G, for large scale optimization problems. The motivation is to improve our previous work on grouping and adaptive weightin...
Zhenyu Yang, Jingqiao Zhang, Ke Tang, Xin Yao, Art...