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ICS
2009
Tsinghua U.
16 years 1 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
ICS
2009
Tsinghua U.
16 years 1 months ago
Dynamic topology aware load balancing algorithms for molecular dynamics applications
Molecular Dynamics applications enhance our understanding of biological phenomena through bio-molecular simulations. Large-scale parallelization of MD simulations is challenging b...
Abhinav Bhatele, Laxmikant V. Kalé, Sameer ...
FCCM
2009
IEEE
171views VLSI» more  FCCM 2009»
16 years 1 months ago
Accelerating SPICE Model-Evaluation using FPGAs
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
Nachiket Kapre, André DeHon
CODES
2006
IEEE
16 years 22 days ago
TLM/network design space exploration for networked embedded systems
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
Nicola Bombieri, Franco Fummi, Davide Quaglia
GLOBECOM
2006
IEEE
16 years 21 days ago
Logical Topology Design and Interface Assignment for Multi-Channel Wireless Mesh Networks
Abstract— A multi-channel wireless mesh network (MCWMN) consists of a number of stationary wireless routers, where each router is equipped with multiple network interface cards (...
Amir Hamed Mohsenian Rad, Vincent W. S. Wong