3395 search results - page 363 / 679 » Circuit-aware architectural simulation |
170
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LCTRTS
2010
Springer
16 years 1 months ago
2010
Springer
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
171
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INFOCOM
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—This paper calls for rethinking packet-switch architectures by cutting all dependencies between the switch fabric and the linecards. Most single-stage packet-switch arch...
171
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MICRO
2009
IEEE
16 years 1 months ago
2009
IEEE
Dynamic Random Access Memory (DRAM) is used as the bulk of the main memory in most computing systems and its energy and power consumption has become a first-class design considera...
160
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CNSR
2008
IEEE
16 years 1 months ago
2008
IEEE
The increasing demand for more bandwidth and the increased application variety fuel the need for high performance network processors. A simple but highly repetitive task performed...
170
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ICC
2008
IEEE
16 years 1 months ago
2008
IEEE
—A novel architecture was proposed in [1] to address scalability issues in large, high speed packet switches. The architecture proposed in [1], namely OBIG (output buffers with i...