3395 search results - page 348 / 679 » Circuit-aware architectural simulation |
134
Voted
ISCAS
2003
IEEE
16 years 1 days ago
2003
IEEE
We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processor...
188
click to vote
EUROPAR
2003
Springer
15 years 12 months ago
2003
Springer
Abstract. The Blue Gene/L supercomputer will use system-on-a-chip integration and a highly scalable cellular architecture. With 65,536 compute nodes, Blue Gene/L represents a new l...
213
Voted
IPPS
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper we propose an efficient real-time communication mechanism for distributed vision processing. One of the biggest problems of distributed vision processing, as is the ...
173
click to vote
ICCD
1999
IEEE
15 years 11 months ago
1999
IEEE
The architecture of the TriMedia CPU64 is based on the TM1000 DSPCPU. The original VLIW architecture has been extended with the concepts of vector processing and superoperations. ...
144
click to vote
ICDCS
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper examines the problem of building scalable, fault-tolerant distributed systems from collections of communicating process groups, while maintaining well-defined end-to-en...