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DSD
2003
IEEE
121views Hardware» more  DSD 2003»
16 years 1 days ago
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors
With shrinking feature size of silicon fabrication technology, architects are putting more and more logic into a single die. While one might opt to use these transistors for build...
Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemi...
IPPS
2003
IEEE
16 years 16 hour ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja
RSP
2003
IEEE
147views Control Systems» more  RSP 2003»
16 years 9 hour ago
Cache Configuration Exploration on Prototyping Platforms
We describe cache architecture, intended for prototype-oriented IC platforms, that automatically finds the best cache configuration for a particular application. The cache itself ...
Chuanjun Zhang, Frank Vahid
POS
1987
Springer
15 years 10 months ago
Realisation of a Dynamically Grouped Object-Oriented Virtual Memory Hierarchy
Conventional paging systems do not perform well with large object-oriented environments (such as Smalltalk-801 [GR83]) due to the fine granularity of objects and the persistence o...
Ifor Williams, Mario Wolczko, T. P. Hopkins
DSRT
2008
IEEE
15 years 8 months ago
RTPROC: A System for Rapid Real-Time Prototyping in Audio Signal Processing
In this contribution a new system for the rapid development of real-time prototypes for digital audio signal processing algorithms on Windows PCs and a Digital Signal Processor (D...
Hauke Krüger, Peter Vary