3395 search results - page 301 / 679 » Circuit-aware architectural simulation |
158
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ESAW
2006
Springer
15 years 10 months ago
2006
Springer
Ad hoc networks are a type of computational system whose members may fail to, or choose not to, comply with the laws governing their behaviour. We are investigating to what extent ...
185
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ITS
2000
Springer
15 years 10 months ago
2000
Springer
We are designing a computational architecture for a "learning economy" based on personal software agents who represent users in a virtual society and assist them in find...
181
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DAC
1995
ACM
15 years 10 months ago
1995
ACM
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
201
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PLDI
1995
ACM
15 years 10 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
156
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DAC
2010
ACM
15 years 10 months ago
2010
ACM
With the end of clock-frequency scaling, parallelism has emerged as the key driver of chip-performance growth. Yet, several factors undermine efficient simultaneous use of onchip ...