3395 search results - page 294 / 679 » Circuit-aware architectural simulation |
160
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HPCA
2003
IEEE
16 years 7 months ago
2003
IEEE
We present an active switch architecture to improve the performance of systems connected via system area networks. Our programmable active switches not only flexibly route packets...
189
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ICCAD
2002
IEEE
16 years 3 months ago
2002
IEEE
This paper describes an optimization technique able to optimize a complete wireless receiver architecture in a reasonable amount of time. The optimizer alternates between spice le...
183
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FPL
2007
Springer
16 years 25 days ago
2007
Springer
In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
157
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DAC
2006
ACM
16 years 19 days ago
2006
ACM
A novel routing algorithm, namely dynamic XY (DyXY) routing, is proposed for NoCs to provide adaptive routing and ensure deadlock-free and livelock-free routing at the same time. ...
171
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LCPC
2004
Springer
16 years 1 days ago
2004
Springer
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...