3395 search results - page 280 / 679 » Circuit-aware architectural simulation |
215
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MICRO
2003
IEEE
15 years 12 months ago
2003
IEEE
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
175
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ICS
2003
Tsinghua U.
15 years 12 months ago
2003
Tsinghua U.
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
195
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EWSN
2007
Springer
16 years 6 months ago
2007
Springer
Abstract. In this paper, we propose and evaluate RIDA, a novel informationdriven architecture for distributed data compression in a sensor network, allowing it to conserve energy a...
196
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ARCS
2009
Springer
16 years 1 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
223
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INFOCOM
2008
IEEE
16 years 1 months ago
2008
IEEE
—Continuous growth in network link rates poses a strong demand on high speed IP lookup engines. While Ternary Content Addressable Memory (TCAM) based solutions serve most of toda...