3395 search results - page 270 / 679 » Circuit-aware architectural simulation |
179
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DSN
2006
IEEE
16 years 21 days ago
2006
IEEE
The advent of deep sub-micron technology has exacerbated reliability issues in on-chip interconnects. In particular, single event upsets, such as soft errors, and hard faults are ...
204
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COMPSAC
2005
IEEE
16 years 8 days ago
2005
IEEE
Distributed processing environments such as that of a traffic management network system (TMS) can be implemented easier, faster, and secure and perform better through use of auton...
196
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HOTI
2005
IEEE
16 years 7 days ago
2005
IEEE
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
165
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IPPS
2005
IEEE
16 years 7 days ago
2005
IEEE
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
175
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ITCC
2005
IEEE
16 years 6 days ago
2005
IEEE
“Mobile Internet” arguably means more than just a new technique for communication; many analysts believe that it will revolutionize the business world and innovate the way ind...