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QSHINE
2005
IEEE
16 years 6 days ago
Grido- An Architecture for a Grid-based Overlay Network
— Grido is an architecture that targets a network operator intending to provide enhanced services to its customers. This is achieved by setting up a “backbone” overlay networ...
Shirshanka Das, Alok Nandan, Michael G. Parker, Gi...
SIGCOMM
2005
ACM
16 years 5 days ago
A DoS-limiting network architecture
We present the design and evaluation of TVA, a network architecture that limits the impact of Denial of Service (DoS) floods from the outset. Our work builds on earlier work on c...
Xiaowei Yang, David Wetherall, Thomas E. Anderson
ICS
2005
Tsinghua U.
16 years 4 days ago
Multigrain parallel Delaunay Mesh generation: challenges and opportunities for multithreaded architectures
Given the importance of parallel mesh generation in large-scale scientific applications and the proliferation of multilevel SMTbased architectures, it is imperative to obtain ins...
Christos D. Antonopoulos, Xiaoning Ding, Andrey N....
ISCA
2003
IEEE
89views Hardware» more  ISCA 2003»
15 years 12 months ago
MisSPECulation: Partial and Misleading Use of SPEC CPU2000 in Computer Architecture Conferences
A majority of the papers published in leading computer architecture conferences use SPEC CPU2000, or its predecessor SPEC CPU95, which has become the de facto standard for measuri...
Daniel Citron
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 12 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...