3395 search results - page 250 / 679 » Circuit-aware architectural simulation |
160
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DATE
2006
IEEE
16 years 20 days ago
2006
IEEE
Mesh architectures are used to distribute critical global signals on a chip, such as clock and power/ground. Redundancy created by mesh loops smooths out undesirable variations be...
168
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IPPS
2006
IEEE
16 years 19 days ago
2006
IEEE
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propo...
184
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EUROPAR
2005
Springer
16 years 4 days ago
2005
Springer
There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to ...
274
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ARTQOS
2003
Springer
15 years 12 months ago
2003
Springer
: This paper describes an architecture for differentiation of Quality of Service in heterogeneous wireless-wired networks. This architecture applies an “all-IP” paradigm, with ...
191
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ICC
2000
IEEE
15 years 11 months ago
2000
IEEE
As the Internet transforms from the traditional best-effort service network into QoS-capable multi-service network, it is essential to have new architectural design and appropriate...