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ISCAS
2005
IEEE
190views Hardware» more  ISCAS 2005»
16 years 5 days ago
Digital VLSI OFDM transceiver architecture for wireless SoC design
—This paper presents the VLSI architecture of an OFDM baseband transceiver for wireless communications. The open-/closed-loop carrier recovery achieves the stepping frequency acq...
Wei-Hsiang Tseng, Ching-Chi Chang, Chorng-Kuang Wa...
ISM
2005
IEEE
128views Multimedia» more  ISM 2005»
16 years 5 days ago
A QoS architecture for MANETs supporting real-time peer-to-peer multimedia applications
In this work we propose a QoS architecture for MANETs based on a probe-based distributed admission control mechanism and the IEEE 802.11e technology. Our aim is to improve peer-to...
Carlos Miguel Tavares Calafate, Juan-Carlos Cano, ...
NPC
2005
Springer
16 years 2 days ago
Performance Modelling and Optimization of Memory Access on Cellular Computer Architecture Cyclops64
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...
AIS
2004
Springer
15 years 12 months ago
Proposal of High Level Architecture Extension
The paper proposes three dimensional extension to High Level ARchitecture (HLA) and Runtime Infrastructure (RTI) to solve several issues such as security, information hiding proble...
Jae-Hyun Kim, Tag Gon Kim
PDP
2003
IEEE
15 years 12 months ago
On Using ZENTURIO for Performance and Parameter Studies on Cluster and Grid Architectures
Over the last decade, a dramatic increase has been observed in the need for generating and organising data in the course of large parameter studies, performance analysis, and soft...
Radu Prodan, Thomas Fahringer, Michael Geissler, G...