Sciweavers

3395 search results - page 232 / 679
» Circuit-aware architectural simulation
Sort
View
COMSWARE
2006
IEEE
16 years 19 days ago
FACTS - A rule-based middleware architecture for wireless sensor networks
ing a middleware abstraction layer into wireless sensor networks is a widely accepted solution to facilitate application programming and allow network organization. In this paper,...
Kirsten Terfloth, Georg Wittenburg, Jochen H. Schi...
DSN
2006
IEEE
16 years 19 days ago
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...
Albert Meixner, Daniel J. Sorin
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
16 years 18 days ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
ISLPED
2006
ACM
140views Hardware» more  ISLPED 2006»
16 years 16 days ago
L-CBF: a low-power, fast counting bloom filter architecture
—An increasing number of architectural techniques rely on hardware counting bloom filters (CBFs) to improve upon the enegy, delay and complexity of various processor structures. ...
Elham Safi, Andreas Moshovos, Andreas G. Veneris
WOWMOM
2006
ACM
156views Multimedia» more  WOWMOM 2006»
16 years 16 days ago
SymbioticSphere: A Biologically-Inspired Autonomic Architecture for Self-Adaptive and Self-Healing Server Farms
This paper describes a biologically-inspired architecture, called SymbioticSphere, which allows large-scale server farms to autonomously adapt to dynamic environmental changes and...
Paskorn Champrasert, Junichi Suzuki