3395 search results - page 228 / 679 » Circuit-aware architectural simulation |
146
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ISCAS
2006
IEEE
16 years 18 days ago
2006
IEEE
— The implementation of a high-performance network-on-chip (NoC) requires an efficient design for the network interface unit (NIU) that connects the switched network to the IP c...
146
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DAC
1999
ACM
16 years 7 months ago
1999
ACM
Abstract { This paper presents the machine description language LISA for the generation of bitand cycle accurate models of DSP processors. Based on a behavioral operation descripti...
164
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
175
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ICPP
2009
IEEE
16 years 1 months ago
2009
IEEE
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
168
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MABS
2007
Springer
16 years 21 days ago
2007
Springer
For the past few years, our research groups have independently been developing systems in which a multi-agent system (typically of lightweight agents) provides some functionality i...