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AIIA
2003
Springer
15 years 11 months ago
Combining Intelligent Agents and Animation
This paper reviews FreeWill and other AI architectures that have contributed to the ideas, which underlie it. “FreeWill” proposes and implements a cognitive architecture design...
Adam Szarowicz, Peter Forte
CODES
2004
IEEE
15 years 10 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
APCSAC
2001
IEEE
15 years 10 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
16 years 26 days ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
ICMCS
2006
IEEE
113views Multimedia» more  ICMCS 2006»
16 years 18 days ago
Enhanced Architectural Support for Variable-Length Decoding
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...
Mohanarajah Sinnathamby, Subramania Sudharsanan, N...