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DAC
1994
ACM
15 years 10 months ago
HSIS: A BDD-Based Environment for Formal Verification
Functional and timing verification are currently the bottlenecks in many design efforts. Simulation and emulation are extensively used for verification. Formal verification is now...
Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin...
DAC
1994
ACM
15 years 10 months ago
Simultaneous Placement and Module Optimization of Analog IC's
New placement techniques are presented which substantially improve the process of automatic layout generation of analog IC's. Extremely tight specifications can be enforced o...
Edoardo Charbon, Enrico Malavasi, Davide Pandini, ...
DAC
1994
ACM
15 years 10 months ago
Synthesis of Instruction Sets for Pipelined Microprocessors
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
Ing-Jer Huang, Alvin M. Despain
IPPS
1992
IEEE
15 years 10 months ago
CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension
This paper presents a hybrid shared memory architecture which combines the scalability of a multistage interconnection network with the contention reduction benefits of coherent c...
Matthew K. Farrens, Arvin Park, Allison Woodruff
PARLE
1992
15 years 10 months ago
Performance Evaluation of Parallel Transaction Processing in Shared Nothing Database Systems
Complex and data-intensive database queries mandate parallel processing strategies to achieve sufficiently short response times. In praxis, parallel database processing is mostly b...
Robert Marek, Erhard Rahm