3395 search results - page 162 / 679 » Circuit-aware architectural simulation |
150
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DAC
1999
ACM
16 years 7 months ago
1999
ACM
This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. 1 instruction-level cycle-accurate simulator is extended wi...
183
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DAC
2000
ACM
16 years 7 months ago
2000
ACM
We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...
178
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DDECS
2008
IEEE
16 years 28 days ago
2008
IEEE
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...
158
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PPAM
2007
Springer
16 years 17 days ago
2007
Springer
Combining simulations of different scale in one application is non-trivial issue. This paper proposes solution that supports complex time interactions that can appear between elem...
168
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CAISE
2003
Springer
15 years 11 months ago
2003
Springer
The use of simulation for a pedagogical purpose is very interesting. One of the essential repercussions of the construction of a pedagogical simulator is the perennisation of the â...