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DSRT
2003
IEEE
15 years 11 months ago
An Event-Synchronization Protocol for Parallel Simulation of Large-Scale Wireless Networks
We present a new conservative event-synchronization protocol, time-based synchronization, for parallel discreteevent simulation of mobile ad hoc wireless networks. Simulators that...
Clinton Kelly IV, Rajit Manohar
HPCA
1999
IEEE
15 years 10 months ago
Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors
Previous simulators for shared-memory architectures have imposed a large tradeoff between simulation accuracy and speed. Most such simulators model simple processors that do not e...
Murthy Durbhakula, Vijay S. Pai, Sarita V. Adve
ICCD
2002
IEEE
135views Hardware» more  ICCD 2002»
16 years 3 months ago
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip
We present a co-simulation environment for multiprocessor architectures, that is based on SystemC and allows a transparent integration of instruction set simulators (ISSs) within ...
Luca Benini, Davide Bertozzi, Davide Bruni, Nicola...
CSSE
2008
IEEE
16 years 28 days ago
Generation of Executable Representation for Processor Simulation with Dynamic Translation
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
Jiajia Song, HongWei Hao, Claude Helmstetter, Vani...
ANSS
2000
IEEE
15 years 11 months ago
IRLSim: A General Purpose Packet Level Network Simulator
Simulation is the main tool for studying networking protocols before deploying them in a wide scale, or for understanding how they are expected to behave under various conditions....
Andreas Terzis, Konstantinos Nikoloudakis, Lan Wan...