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DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 10 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli
DSN
2004
IEEE
15 years 10 months ago
An Architectural Framework for Providing Reliability and Security Support
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
MCS
2006
Springer
15 years 6 months ago
Architectural concepts and Design Patterns for behavior modeling and integration
The design of the control software for complex systems is a difficult task. It requires the modeling, the simulation, the integration and the adaptation of a multitude of intercon...
Jean-Marc Perronne, Laurent Thiry, Bernard Thirion
AR
1998
106views more  AR 1998»
15 years 6 months ago
A cognitive robot architecture based on tactile and visual information
In this paper, we propose an architecture for a cognitive robot based on tactile and visual information. Visual information contains various features such as location and area of ...
Kazunori Terada, Takayuki Nakamura, Hideaki Takeda...