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SBACPAD
2006
IEEE
148views Hardware» more  SBACPAD 2006»
16 years 11 days ago
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...
Vasanth Krishna Namasivayam, Animesh Pathak, Vikto...
SMI
2006
IEEE
152views Image Analysis» more  SMI 2006»
16 years 11 days ago
A Laplacian Based Approach for Free-Form Deformation of Sparse Low-degree IMplicit Surfaces
Sparse Low-degree IMplicit (SLIM) surface [11] is a recently developed non-conforming surface representation. In this paper, a method for free-form deformation of SLIM surfaces is...
Yutaka Ohtake, Takashi Kanai, Kiwamu Kase
ACIVS
2006
Springer
16 years 11 days ago
Improvement of Conventional Deinterlacing Methods with Extrema Detection and Interpolation
Abstract. This article presents a new algorithm for spatial deinterlacing that could easily be integrated in a more complete deinterlacing system, typically a spatio-temporal motio...
Jérôme Roussel, Pascal Bertolino, Mar...
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
16 years 10 days ago
Using speculative computation and parallelizing techniques to improve scheduling of control based designs
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
Roberto Cordone, Fabrizio Ferrandi, Marco D. Santa...
DATE
2005
IEEE
109views Hardware» more  DATE 2005»
15 years 12 months ago
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...