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CGO
2006
IEEE
16 years 17 days ago
Compiling for EDGE Architectures
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
Aaron Smith, Jon Gibson, Bertrand A. Maher, Nichol...
RTCSA
2006
IEEE
16 years 15 days ago
Instruction Scheduling with Release Times and Deadlines on ILP Processors
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
Hui Wu, Joxan Jaffar, Jingling Xue
IWCMC
2006
ACM
16 years 13 days ago
Modeling key agreement in multi-hop ad hoc networks
Securing multicast communications in ad hoc networks has become one of the most challenging research directions in the areas of wireless networking and security. This is especiall...
Giovanni Di Crescenzo, Maria Striki, John S. Baras
MOBICOM
2006
ACM
16 years 13 days ago
Enabling distributed throughput maximization in wireless mesh networks: a partitioning approach
This paper considers the interaction between channel assignment and distributed scheduling in multi-channel multiradio Wireless Mesh Networks (WMNs). Recently, a number of distrib...
Andrew Brzezinski, Gil Zussman, Eytan Modiano
IPPS
2005
IEEE
16 years 2 days ago
On the Optimal Placement of Secure Data Objects over Internet
Secret sharing algorithms have been used for intrusion tolerance, which ensure the confidentiality, integrity and availability of critical information. However, dynamically changi...
Manghui Tu, Peng Li, Qingkai Ma, I-Ling Yen, Farok...