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ISPASS
2010
IEEE
16 years 1 months ago
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
Karthik Ganesan, Jungho Jo, Lizy K. John
ICSM
2008
IEEE
16 years 1 months ago
Understanding the rationale for updating a function's comment
Up-to-date comments are critical for the successful evolution of a software application. When modifying a function, developers may update the comment associated with the function ...
Haroon Malik, Istehad Chowdhury, Hsiao-Ming Tsou, ...
ECOOPW
2000
Springer
15 years 11 months ago
Metadata and Adaptive Object-Models
Abstract. The unrelenting pace of change that confronts contemporary software developers compels them to make their applications more configurable, flexible, and adaptable. A way t...
Joseph W. Yoder, Reza Razavi
PADS
1999
ACM
15 years 11 months ago
Shock Resistant Time Warp
In an attempt to cope with time-varying workload, traditional adaptive Time Warp protocols are designed to react in response to performance changes by altering control parameter c...
Alois Ferscha, James Johnson
RTSS
1998
IEEE
15 years 11 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...