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» Challenges for Model-Integrating Components
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ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
16 years 3 months ago
A Two-Layer Bus Routing Algorithm for High-Speed Boards
The increasing clock frequencies in high-end industrial circuits bring new routing challenges that can not be handled by traditional algorithms. An important design automation pro...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2008
IEEE
109views Hardware» more  ICCAD 2008»
16 years 3 months ago
Verifying external interrupts of embedded microprocessor in SoC with on-chip bus
—The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in the unit-level. Especially for the external interrupts, since they interface with othe...
Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang
ISQED
2010
IEEE
227views Hardware» more  ISQED 2010»
16 years 1 months ago
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, ...
CHI
2010
ACM
16 years 1 months ago
The design and evaluation of multitouch marking menus
Despite the considerable quantity of research directed towards multitouch technologies, a set of standardized UI components have not been developed. Menu systems provide a particu...
G. Julian Lepinski, Tovi Grossman, George W. Fitzm...
CISIS
2009
IEEE
16 years 1 months ago
Ontology-Based Generation of Bayesian Networks
Bayesian networks are indispensable for determining the probability of events which are influenced by various components. Bayesian probabilities encode degrees of belief about ce...
Stefan Fenz, A. Min Tjoa, Marcus Hudec