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IPPS
1997
IEEE
15 years 10 months ago
External Adjustment of Runtime Parameters in Time Warp Synchronized Parallel Simulators
Several optimizations to the Time Warp synchronization protocol for parallel discrete event simulation have been proposed and studied. Many of these optimizations have included so...
Radharamanan Radhakrishnan, Lantz Moore, Philip A....
ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
15 years 10 months ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta
ISMVL
1997
IEEE
99views Hardware» more  ISMVL 1997»
15 years 10 months ago
Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits
This paper shows how the application of a CMOS ternary logic is useful in the realisation of Delay Insensitive (01)asynchronous circuits. It is shown that fully DIasynchronous cir...
Riccardo Mariani, Roberto Roncella, Roberto Salett...
RTSS
1997
IEEE
15 years 10 months ago
More optimism about real-time distributed commit processing
In [6], we proposed a new commit protocol, OPT, specially designed for use in distributed firm-deadline real-time database systems. OPT allows transactions to “optimistically...
Ramesh Gupta, Jayant R. Haritsa, Krithi Ramamritha...
SIGMETRICS
1997
ACM
111views Hardware» more  SIGMETRICS 1997»
15 years 10 months ago
Cache Behavior of Network Protocols
In this paper we present a performance study of memory reference behavior in network protocol processing, using an Internet-based protocol stack implemented in the x-kernel runnin...
Erich M. Nahum, David J. Yates, James F. Kurose, D...
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