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ICCAD
1996
IEEE
114views Hardware» more  ICCAD 1996»
15 years 10 months ago
An efficient approach to simultaneous transistor and interconnect sizing
In this paper, we study the simultaneous transistor and interconnect sizing (STIS) problem. We de ne a class of optimization problems as CH-posynomial programs and reveal a genera...
Jason Cong, Lei He
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
15 years 11 months ago
Variation-aware interconnect extraction using statistical moment preserving model order reduction
—1 In this paper we present a stochastic model order reduction technique for interconnect extraction in the presence of process variabilities, i.e. variation-aware extraction. It...
Tarek A. El-Moselhy, Luca Daniel
DM
2007
125views more  DM 2007»
15 years 6 months ago
Generalized switch-setting problems
Switch-setting games like Lights Out are typically modelled as a graph, where the vertices represent switches and lamps, and the edges capture the switching rules. We generalize t...
Torsten Muetze
DM
2008
80views more  DM 2008»
15 years 6 months ago
Restrained bondage in graphs
Let G = (V, E) be a graph. A set S V is a restrained dominating set if every vertex not in S is adjacent to a vertex in S and to a vertex in V - S. The restrained domination numb...
Johannes H. Hattingh, Andrew R. Plummer
GECCO
2008
Springer
148views Optimization» more  GECCO 2008»
15 years 7 months ago
Solving constrained multi-objective problems by objective space analysis
In this paper a new approach to solve constrained multi-objective problems by way of evolutionary multi-objective optimization is introduced. In contrast to former evolutionary ap...
Gideon Avigad, Carlos A. Coello Coello