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CODES
2006
IEEE
15 years 10 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
15 years 10 months ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith
DAC
1995
ACM
15 years 10 months ago
On the Bounded-Skew Clock and Steiner Routing Problems
We study the minimum-costbounded-skewrouting tree (BST) problem under the linear delay model. This problem captures several engineering tradeoffs in the design of routing topologi...
Dennis J.-H. Huang, Andrew B. Kahng, Chung-Wen Alb...
DAC
2010
ACM
15 years 10 months ago
Electronic design automation for social networks
Online social networks are a growing internet phenomenon: they connect millions of individuals through sharing of common interests, political and religious views, careers, etc. So...
Andrew DeOrio, Valeria Bertacco
ATAL
2008
Springer
15 years 8 months ago
SmartBody: behavior realization for embodied conversational agents
Researchers demand much from their embodied conversational agents (ECAs), requiring them to be both life-like, as well as responsive to events in an interactive setting. We find t...
Marcus Thiébaux, Stacy Marsella, Andrew N. ...