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ICCAD
2003
IEEE
325views Hardware» more  ICCAD 2003»
15 years 12 months ago
Hardware Scheduling for Dynamic Adaptability using External Profiling and Hardware Threading
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...
Brian Swahn, Soha Hassoun
IPPS
2003
IEEE
15 years 12 months ago
Performance and Overhead in a Hybrid Reconfigurable Computer
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. IntelÂ...
Osman Devrim Fidanci, Daniel S. Poznanovic, Kris G...
PDP
2003
IEEE
15 years 12 months ago
Automatic Optimisation of Parallel Linear Algebra Routines in Systems with Variable Load
Abstract. In this work an architecture of an automatically tuned linear algebra library proposed in previous works is extended in order to adapt it to platforms where both the CPU ...
Javier Cuenca, Domingo Giménez, José...
SBACPAD
2003
IEEE
125views Hardware» more  SBACPAD 2003»
15 years 12 months ago
Applying Scheduling by Edge Reversal to Constraint Partitioning
— Scheduling by Edge Reversal (SER) is a fully distributed scheduling mechanism based on the manipulation of acyclic orientations of a graph. This work uses SER to perform constr...
Marluce Rodrigues Pereira, Patrícia Kayser ...
WCRE
2003
IEEE
15 years 12 months ago
Extracting an Explicitly Data-Parallel Representation of Image-Processing Programs
Our research goal is to retarget image processing programs written in sequential languages (e.g., C) to architectures with data-parallel processing capabilities. Image processing ...
Lewis B. Baumstark Jr., Murat Guler, Linda M. Will...