4809 search results - page 624 / 962 » CajunBot: Architecture and algorithms |
162
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
We propose a control theory-based dynamic voltage scaling (DVS) algorithm for interactive 3D game applications running on batterypowered portable devices. Using this scheme, we pe...
158
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
184
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
175
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
171
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...